Semiconductor integrated circuits are subject to serious damage caused by ESD events. As semiconductor features continue to decrease in sizes, supply voltages also continue to decrease. In relatively low power supply voltages (e.g., less than 6 V), shallow trench isolation (STI) diodes and gate-controlled diodes can be used as ESD protection devices. In relatively high power supply voltages (e.g., more than 6 V), gate-grounded N-type MOS (GGNMOS) transistors can be used as ESD protection devices.
However, for fin-type field effect transistor (FinFET) devices, the amount of generated hot carriers due to the small-size fin is insufficient to effectively trigger a GNNMOS transistor.
Thus, there is a need for a novel ESD protection structure for high voltage applications and method for manufacturing the same.